Be part of our success story by joining our design team !.

V-Trans is a relatively new sucessfull IC design company based in Shanghai providing high quality analog and mixed signal IP for SOC.
We have few new openings for highly motivated individuals who can appreciate a very friendly work atmosphere and can be a team player.

IC Analog design Engineer
Mask Layout designer
Senior ADC or PLL design Engineer

IC Analog design Engineer

Responsibilities:
    • design of high speed mixed-signal circuits from specification to silicon verification, including schematic capture, spice simulation, physical layout, documentation and drive silicon measurements. (Virtuoso, spice, spectre)
    • interact with other engineer to identify and solve electrical problems,
    • able to self manage and to deliver on schedule.

Minimum Requirements:
    • A BS or MS in EE, or equivalent experience
    • Excellent spoken and written communication skills (+English)
    • Good documentation practices
    • highly motivated individual with team spirit.

With 2-4 years of experience in several of the following areas:
    • Schematic-level digital design (experience with Virtuoso a plus)
    • Flat-panel electronics (DVI, LVDS, HDMI)
    • IO bus implementation (PCI, USB, ISA, AGP, etc.)
    • Peripheral component design (Ethernet, memory subsystems, etc.)
    • Digital and mixed-signal PCB design
    • Power conversion and management
    • ESD expertise
    • physical Layout design
    • advanced analog blocs such as amplifiers, filters, PLLs, ADCs, CDR, serdes.
    • Cshell, perl scripting

Experience in video is a plus.

Mask Layout designer

Responsibilities:
    • Layout design of high speed analog cmos circuits and logic blocs
    • layout verification DRC/LVS
    • Understand the critical requirements of analog design
    • be able to learn quickly and adapt
    • able to self manage and to deliver on schedule.
    • be a team player.

Minimum Requirements:
    • A BS or MS in EE, or equivalent experience
    • 3+ years proven recent experience in sub micro layout design
    • Excellent spoken communication skills (Chinese +English)
    • highly motivated individual with team spirit.
    • Experience with Virtuoso, and Calibre or Hercules
    • scripting knowledge a plus (C shell, SKILL, perl)
    • DRC or LVS tech file scripting/understanding

Senior ADC or PLL design Engineer

We are looking for candidates with either Analog RFIC Design experience or type of High speed Analog Design experience such as PLL design, or A/D Design and etc...
This is the perfect opportunity for the right candidate.
Baseband communication and/or digital signal processing fundamentals are highly desired. The designer will work on developing ICs containing converters and PLLs for various applications.

An MSEE is required, PhD degree preferred in analog IC design. A strong background in signal processing for communication systems is highly desirable but not required. Experience with Matlab and/or Simulink, VerilogA coding, etc. is a plus. Candidates must have a minimum of 6-8 years of experience in analog IC design including 3-4 years of experience in PLL design or ADC design. In addition, candidates should have experience in designing mixed-signal circuits and taking an IC through design, layout, evaluation, and release to production.
Sub-micron CMOS experience is required.

V-Trans is a relatively new sucessfull IC design company based in Shanghai providing high quality analog and mixed signal IP for SOC. We have few new openings for highly motivated individuals who can appreciate a very friendly work atmosphere and can be a team player.

V-Trans is a relatively new sucessfull IC design company based in Shanghai providing high quality analog and mixed signal IP for SOC.
We have few new openings for highly motivated individuals who can appreciate a very friendly work atmosphere and can be a team player.